Digital Systems Lab

Responsible	Tahmina Aktar Trisha
Last Update	10/22/2021
Completion Time	22 hours 35 minutes
Members	1

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Tahmina Aktar Trisha

Lab report Demonstration
- Lab report Demonstration
  
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- JAM file of Integrated Circuit (IC) Specification
  
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- Recorded Lab class link on Integrated Circuit Specification
  
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Verify the operation of Basic logic gate
- Lab Experiment 1Part 1
  
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- Lab Experiment 1 Part 2
  
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- JAM file of Basic gates
  
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- JAM File of Basic gate
  
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Verify the operation Universality of NAND Gate
- Lab Experiment 2 part 1
  
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- Lab Experiment 2 Part 2
  
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- Experiment 3
  
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- JAM File of Universality of NAND Gate
  
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Verify the operation Universality of NOR Gate
- Recorded Lab class link on universality of NOR Gate
  
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- JAM file of universality of NOR gate
  
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Verify The operation of the Boolean expression z=A'B+AB' using basic logic gates
- Recorded Lab class link on A'B+AB' Boolean expression part 1
  
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- Recorded Lab class link on A'B+AB' Boolean expression part 2
  
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- Recorded the Lab class link on A'B+AB' Boolean expression 3
  
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- JAM File of A'B+AB' Boolean Expression
  
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- JAM File of A'B+AB' Boolean Expression 2
  
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Verify the Operation Half Adder Circuit
- Lab Experiment 4
  
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- JAM File of Half Adder circuit
  
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- JAM File of Half Adder circuit 2
  
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- Practical Implementation with Device Experiment 1
  
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- Practical Implementation with Device Experiment 2
  
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Blended Class
- Class recording of Blended Class of Lab experiment
  
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Verify the Operation Full Adder Circuit
- Recorded Lab class link on Full Adder Circuit part 1
  
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- JAM File of Full Adder circuit
  
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- JAM File of Full Adder circuit 2
  
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QUIZ
- Recorded class link on Quiz 1
  
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Jam Board File
- Discussion session with CSE 20th Batch All Section
  
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Digital Systems Lab

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